Targeting low-end and midrange digital-television markets, the TC90400XBG and TC90400FG SOCs use a 64-bit, MIPS-based RISC host processor and three DSP processors. Able to decode multiple ...
This paper describes an ASIP decoder template suitable for multi-standard Viterbi, Turbo and LDPC decoding. We show architecture fitness for WLAN, WiMAX and 3GPPLTE standards, although various other ...
USA: The global transition from analog to digital television broadcast is spurring TV makers to offer sets with more advanced video decoding chips capable of working with multiple and new video ...
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