Hackaday

Pocket-sized Test Pattern Generator Helps Check Those CRTs

[Nicholas Murray]’s Composite Test Pattern Generator is a beautifully-made, palm-sized tool that uses an ESP32-based development board to output different test patterns in PAL/NTSC. If one is checking ...
EDN

Take scan test out of the critical path

Integrated circuit complexity and integration continuously advances, posing challenges to the development process. Market profitability, however, demands that products be designed and produced as fast ...
Hackaday

test pattern

[Nicholas Murray]’s Composite Test Pattern Generator is a beautifully-made, palm-sized tool that uses an ESP32-based development board to output different test patterns in PAL/NTSC. If one is checking ...
Electronic Design

TetraMAX II shortens test pattern generation from days to hours

Mountain View, CA. Synopsys Inc. on Tuesday announced its next-generation ATPG and diagnostics solution, TetraMAX II, incorporating the innovative test engines unveiled at the International Test ...
EDN

Best design practices for DFT

SoC sub-components (IPs) generally come from various sources – internal and external – and with that it has become necessary that designers ensure the RTL is testable. If the RTL has testability ...