RISC-V International manages the RISC-V open source instruction set. It is supported by a range of tools and compilers. This TechXchange includes content that takes a look at those tools. In this ...

CEVA-BX1 and CEVA-BX2 Audio DSPs and audio front-end software to be available through Intel Pathfinder for RISC-V ROCKVILLE, Md., Dec. 1, 2022 /PRNewswire/ -- CEVA, Inc. (NASDAQ: CEVA), the leading ...

CHANDLER, Ariz., Dec. 10, 2019 (GLOBE NEWSWIRE) -- RISC-V Summit — The trend towards compute intensive gateways and edge devices is driving the integration of traditional deterministic control ...

The open-source nature of RISC-V brings the benefits of a modular and royalty-free instruction set architecture (ISA) that eliminates licensing fees, can accelerate development, and fosters ...

Adoption of RISC-V processors is accelerating. This technology, like everything, comes with benefits and risks. The open standard means freedom for many developers, but success depends on the ...

Closed systems stagnate innovation—Linux users know this. Licenses, royalties, and fees keep the well-funded in control. RISC-V throws that out the window because it's free to adopt, adapt, and ...

RISC-V chip design and IP powerhouse, SiFive, just announced availability of its new HiFive Premier P550 development board, and it's sure to make waves at the RISC-V Summit this week in Santa Clara.

UPPSALA, Sweden--(BUSINESS WIRE)--IAR Systems®, the world leader in software and services for embedded development, has just announced the full support of their latest release of IAR Embedded ...

RISC-V is an open-source instruction set definition managed by RISC-V International. This TechXchange includes content that delves into the architecture and design of a RISC-V processor core. How did ...

READING, United Kingdom, May 28, 2025 — Aion Silicon (formerly Sondrel), an ASIC and SoC architecture partner, today announced it has secured a $12 million engagement to provide design services for a ...

RISC-V is no longer content to disrupt the CPU industry. It is waging war against every type of processor integrated into an SoC or advanced package, an ambitious plan that will face stiff competition ...

A European team of university students has cobbled together the first RISC-V supercomputer capable of showing balanced power consumption and performance. More importantly, it demonstrates a potential ...