Business Wire

Keithley Adds Support for Non-Volatile Memory, Very Low Frequency C-V, and Increased Parallel Testing to Semiconductor Parameter Analyzer

CLEVELAND--(BUSINESS WIRE)--Keithley Instruments, Inc., a world leader in advanced electrical test instruments and systems, has introduced a variety of enhancements for its award-winning Model ...
Semiconductor Engineering

Balancing Parallel Test Productivity With Yield & Cost

Parallel test is used for nearly every device produced by fabs and OSATs, but it can reduce yield and increase the cost of test boards and operations. This is a well-understood tradeoff for ensuring ...
Semiconductor Engineering

Wafer-Level Test Infrastructure for Higher Parallel Wafer Level Testing of SoC

A new technical paper titled “Design and Implementation of Test Infrastructure for Higher Parallel Wafer Level Testing of System-on-Chip” was published by researchers at Inha University and Teradyne. ...
EDN

Parallel parametric test goes asynchronous

Parallel test is a surefire method for speeding up production, and asynchronous parallel test has long been known as an effective way of significantly improving through-put while making the most of ...