Semiconductor Engineering

How FinFET Device Performance Is Affected By Epitaxial Process Variations

As the need to scale transistors to ever-smaller sizes continues to press on technology designers, the impact of parasitic resistance and capacitance can approach or even outpace other aspects of ...
Semiconductor Engineering

Using A Virtual DOE To Predict Process Windows And Device Performance Of Advanced FinFET Technology

With continuing finFET device process scaling, micro loading control becomes increasingly important due to its significant impact on yield and device performance [1-2]. Micro-loading occurs when the ...
EDN

Samsung and Synopsys Deliver Design Tools and IP for 14-nm FinFET Process

Synopsys, Inc. (Nasdaq:SNPS), a global leader providing software, IP and services used to accelerate innovation in chips and electronic systems, today announced certification and immediate ...
EDN

All you need to know about GAA chip manufacturing process

The gate-all-around (GAA) semiconductor manufacturing process, also known as gate-all-around field-effect transistor (GAA-FET) technology, defies the performance limitations of FinFET by reducing the ...
Business Wire

Cadence Achieves EDA Certification for TSMC 5nm and 7nm+ FinFET Process Technologies to Facilitate Mobile and HPC Design Creation

SAN JOSE, Calif.--(BUSINESS WIRE)--Cadence Design Systems, Inc. (NASDAQ:CDNS) today announced its continued collaboration with TSMC to certify its design solutions for TSMC 5nm and 7nm+ FinFET process ...
Digi Times

Highlights of the day: TSMC reportedly adopts GAA transistors for 2nm chips

TSMC's has disclosed that its 3nm process will continue to adopt a FinFET structure, but the foundry reportedly will take a new approach to its 2nm chip development, replacing FinFET with GAA ...
Android

Samsung Gets Ready for 14nm FinFET Chips

TSMC and Global Foundries have already announced their plans for 14nm and 16nm FinFET chips, that they should start building in 2014, and then we’ll probably see them no sooner than 2015, which is ...
insideHPC

TSMC Offers Its FinFET Technology to Academia for IC Design Skills Development

HSINCHU, Taiwan, R.O.C., Feb. 3, 2023 – TSMC today announced the launch of its “TSMC University FinFET Program,” aimed at developing future IC design talent for the industry and empowering academic ...
ExtremeTech

GlobalFoundries announces new 7nm FinFET process, full node shrink

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Nasdaq

Synopsys Achieves More Than 250 Design Wins with DesignWare IP on TSMC 7nm FinFET Process

Silicon-proven DesignWare PHY IP on TSMC's 7nm FinFET process includes USB, DDR, LPDDR, HBM, PCI Express, MIPI, DisplayPort, and Ethernet Successful customer tapeouts of DesignWare Logic Libraries and ...
insideHPC

Intel Releases Foundational Technology Roadmap, Launches New Naming Structure for Process Nodes

Intel Corporation today announced a detailed process and packaging technology roadmaps of “foundational innovations” for products through 2025 and beyond. In addition to announcing RibbonFET, its ...